The application titled "Low-Noise Vertical Bipolar Transistor and Corresponding Fabrication Process" discloses a method for producing a vertical bipolar transistor with a silicon/germanium heterojunction base and an epitaxial emitter on the upper surface of the base. During production of such a transistor, a region of the intrinsic collector lying under the emitter window is selectively doped to increase the speed of the transistor. In other words, the value of its transition frequency, i.e., cutoff frequency for the current gain, and the value of its maximum oscillation frequency, i.e., cutoff frequency for the power gain, are increased.
This selective doping is preferably carried out on two successive phosphorus implantations through the heterojunction base, which has been epitaxially grown beforehand on the surface of the intrinsic collector. For these implantations, use is made of the resin block which was used for etching the emitter window to obtain implantation of the overdosed zone of the collector, which is aligned with the emitter window.
However, implanting through the base creates defects in it which will cause diffusion of the boron in the base. The extent of this will become greater as the dopant dose implanted in the intrinsic collector increases. Lastly, implanting through the base leads to broadening of the base, which causes a reduction in the speed of the transistor. Furthermore, the defects actively contribute to relaxing the SiGe layer, which generates dislocations, thus short-circuiting the junctions of the transistor.